A 160 nW 25 kS/s 9-bit SAR ADC for neural signal recording applications

• Main Authors: Do, Anh Tuan, Lam, Chun Kit, Tan, Yung Sern, Yeo, Kiat Seng, Cheong, Jia Hao, Zou, Xiaodan, Yao, Lei, Cheng, Kuang Wei, Je, Minkyu
• 其他作者: School of Electrical and Electronic Engineering
• 格式: Conference or Workshop Item
• 語言: English
• 出版: 2013
• 主題: DRNTU::Engineering::Electrical and electronic engineering
• 在線閱讀: https://hdl.handle.net/10356/95719; http://hdl.handle.net/10220/11771
• 機構: Nanyang Technological University

This paper presents a 9-bit 25 kS/s SAR ADC in 0.18 μm CMOS technology for neural signal recording applications. The ADC is powered by a single supply voltage of 1V to comply with other digital processing units on the same chip. The proposed ADC has one common-mode DC input of 0.5V thus offering a f...