A VLSI efficient programmable power-of-two scaler for 2n-1, 2n,2n+1 RNS

• المؤلفون الرئيسيون: Low, Jeremy Yung Shern, Chang, Chip Hong
• مؤلفون آخرون: School of Electrical and Electronic Engineering
• التنسيق: مقال
• اللغة: English
• منشور في: 2013
• الموضوعات: DRNTU::Engineering::Electrical and electronic engineering
• الوصول للمادة أونلاين: https://hdl.handle.net/10356/95909; http://hdl.handle.net/10220/11327
• المؤسسة: Nanyang Technological University

Variable scaling by power-of-two factor is the backbone operation of floating point arithmetic and is also commonly used in fixed-point digital signal processing (DSP) system for overflow prevention. While this operation can be readily performed in binary number system, it is extremely difficult to...