A robust asynchronous approach for realizing ultra-low power digital Self-Adaptive VDD Scaling system

• Main Authors: Gwee, Bah Hwee, Shu, Wei, Lin, Tong, Chong, Kwen-Siong, Chang, Joseph Sylvester
• Other Authors: School of Electrical and Electronic Engineering
• Format: Conference or Workshop Item
• Language: English
• Published: 2013
• Subjects: DRNTU::Engineering::Electrical and electronic engineering
• Online Access: https://hdl.handle.net/10356/98223; http://hdl.handle.net/10220/12119
• Institution: Nanyang Technological University

Self-Adaptive VDD Scaling (SAVS) technique achieves power/energy reduction by dynamically scaling VDD for the prevailing conditions. However, when applied in sub-threshold (sub-Vt) region, robustness issues need to be addressed due to the severe delay uncertainty associated with sub-Vt Process, Voltage, and Temperature (PVT) variations. To ensure robustness for sub-Vt SAVS, we adopt the asynchronous-logic (async) Quasi-Delay-Insensitive (QDI) approach. To address the usual power/energy overheads associated with conventional async QDI systems, we further propose a hardware-simplified version of QDI (`pseudo-QDI') with an easy-to-met implicit timing. Prototype ICs embodying async filter banks realized in both the conventional QDI and pseudo-QDI have demonstrated the extreme robustness of the proposed approach against sub-Vt PVT variations. Measurement results further suggest pseudo-QDI's energy (~40% lower) and area (~1.34× smaller) advantages as compared to its conventional QDI counterpart.