An efficient soft error protection scheme for MPSoC and FPGA-based verification
As transistor density continues to increase with the advent of nanotechnology, reliability issues raised by more frequently appeared soft errors are becoming critical tasks for future embedded multiprocessor systems design. State-of-the-art techniques for soft error protections targeting multiproces...
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Main Authors: | , , |
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Other Authors: | |
Format: | Article |
Language: | English |
Published: |
2013
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Subjects: | |
Online Access: | https://hdl.handle.net/10356/98394 http://hdl.handle.net/10220/12463 |
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Institution: | Nanyang Technological University |
Language: | English |