Analytical models for the electric potential, threshold voltage and drain current of long-channel junctionless double-gate transistors
Analytical models for the electric potential, threshold voltage and drain current of long-channel junctionless (JL) double-gate (DG) field-effect transistors (FET) are presented. A regional method is used to solve the Poisson equation under different gate biases, and the electric potential is obtain...
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sg-ntu-dr.10356-985892020-03-07T13:57:23Z Analytical models for the electric potential, threshold voltage and drain current of long-channel junctionless double-gate transistors Ding, Zhihao Hu, Guangxi Liu, Ran Wang, Lingli Hu, Shuyan Zhou, Xing School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering Analytical models for the electric potential, threshold voltage and drain current of long-channel junctionless (JL) double-gate (DG) field-effect transistors (FET) are presented. A regional method is used to solve the Poisson equation under different gate biases, and the electric potential is obtained. With the potential model, an analytical expression for the threshold voltage is achieved. An expression for the drain current is derived from the potential model. The analytical results are compared with simulations, and excellent agreements are observed. The models accurately describe the characteristics of JLDG FETs, and they are very helpful for the design and optimization of devices. 2013-11-15T06:55:34Z 2019-12-06T19:57:10Z 2013-11-15T06:55:34Z 2019-12-06T19:57:10Z 2013 2013 Journal Article Ding, Z., Hu, G., Liu, R., Wang, L., Hu, S., & Zhou, X. (2013). Analytical models for the electric potential, threshold voltage and drain current of long-channel junctionless double-gate transistors. Journal of the korean physical society, 62(8), 1188-1193. https://hdl.handle.net/10356/98589 http://hdl.handle.net/10220/17701 10.3938/jkps.62.1188 en Journal of the korean physical society |
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DRNTU::Engineering::Electrical and electronic engineering Ding, Zhihao Hu, Guangxi Liu, Ran Wang, Lingli Hu, Shuyan Zhou, Xing Analytical models for the electric potential, threshold voltage and drain current of long-channel junctionless double-gate transistors |
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Analytical models for the electric potential, threshold voltage and drain current of long-channel junctionless (JL) double-gate (DG) field-effect transistors (FET) are presented. A regional method is used to solve the Poisson equation under different gate biases, and the electric potential is obtained. With the potential model, an analytical expression for the threshold voltage is achieved. An expression for the drain current is derived from the potential model. The analytical results are compared with simulations, and excellent agreements are observed. The models accurately describe the characteristics of JLDG FETs, and they are very helpful for the design and optimization of devices. |
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School of Electrical and Electronic Engineering |
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School of Electrical and Electronic Engineering Ding, Zhihao Hu, Guangxi Liu, Ran Wang, Lingli Hu, Shuyan Zhou, Xing |
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Article |
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Ding, Zhihao Hu, Guangxi Liu, Ran Wang, Lingli Hu, Shuyan Zhou, Xing |
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Ding, Zhihao |
title |
Analytical models for the electric potential, threshold voltage and drain current of long-channel junctionless double-gate transistors |
title_short |
Analytical models for the electric potential, threshold voltage and drain current of long-channel junctionless double-gate transistors |
title_full |
Analytical models for the electric potential, threshold voltage and drain current of long-channel junctionless double-gate transistors |
title_fullStr |
Analytical models for the electric potential, threshold voltage and drain current of long-channel junctionless double-gate transistors |
title_full_unstemmed |
Analytical models for the electric potential, threshold voltage and drain current of long-channel junctionless double-gate transistors |
title_sort |
analytical models for the electric potential, threshold voltage and drain current of long-channel junctionless double-gate transistors |
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2013 |
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https://hdl.handle.net/10356/98589 http://hdl.handle.net/10220/17701 |
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1681046378608852992 |