Retention time characterization and optimization of logic-compatible embedded DRAM cells
Logic-compatible 2T and 3T embedded DRAMs (eDRAM) have recently gained their popularity in embedded applications because of their high density and good voltage margin. The most important design requirements in eDRAM cells are cell area, data retention time and read speed. In this paper, we present a...
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sg-ntu-dr.10356-990472020-03-07T13:24:49Z Retention time characterization and optimization of logic-compatible embedded DRAM cells Do, Anh Tuan Yi, He Yeo, Kiat Seng Kim, Tony Tae-Hyoung School of Electrical and Electronic Engineering Asia Symposium on Quality Electronic Design (4th : 2012 : Penang, Malaysia) DRNTU::Engineering::Electrical and electronic engineering Logic-compatible 2T and 3T embedded DRAMs (eDRAM) have recently gained their popularity in embedded applications because of their high density and good voltage margin. The most important design requirements in eDRAM cells are cell area, data retention time and read speed. In this paper, we present an in-depth analysis on the data retention time of various logic-compatible eDRAM cells, followed by the effects of several design factors on the retention time. A systematic methodology is proposed for enhancing the retention time of the eDRAM cells. Simulation results using a standard 65nm CMOS technology show that the optimization process improves the data retention time more than 3x. Finally, the number of read operations per retention period is estimated to show the effectiveness of each eDRAM cell. Analysis demonstrates that although the 2T eDRAM cell has a shorter retention time than the conventional 3T cell, it has better effectiveness due to the faster read operation. 2013-07-31T03:43:32Z 2019-12-06T20:02:40Z 2013-07-31T03:43:32Z 2019-12-06T20:02:40Z 2012 2012 Conference Paper https://hdl.handle.net/10356/99047 http://hdl.handle.net/10220/12575 10.1109/ACQED.2012.6320471 en |
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DRNTU::Engineering::Electrical and electronic engineering Do, Anh Tuan Yi, He Yeo, Kiat Seng Kim, Tony Tae-Hyoung Retention time characterization and optimization of logic-compatible embedded DRAM cells |
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Logic-compatible 2T and 3T embedded DRAMs (eDRAM) have recently gained their popularity in embedded applications because of their high density and good voltage margin. The most important design requirements in eDRAM cells are cell area, data retention time and read speed. In this paper, we present an in-depth analysis on the data retention time of various logic-compatible eDRAM cells, followed by the effects of several design factors on the retention time. A systematic methodology is proposed for enhancing the retention time of the eDRAM cells. Simulation results using a standard 65nm CMOS technology show that the optimization process improves the data retention time more than 3x. Finally, the number of read operations per retention period is estimated to show the effectiveness of each eDRAM cell. Analysis demonstrates that although the 2T eDRAM cell has a shorter retention time than the conventional 3T cell, it has better effectiveness due to the faster read operation. |
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School of Electrical and Electronic Engineering |
author_facet |
School of Electrical and Electronic Engineering Do, Anh Tuan Yi, He Yeo, Kiat Seng Kim, Tony Tae-Hyoung |
format |
Conference or Workshop Item |
author |
Do, Anh Tuan Yi, He Yeo, Kiat Seng Kim, Tony Tae-Hyoung |
author_sort |
Do, Anh Tuan |
title |
Retention time characterization and optimization of logic-compatible embedded DRAM cells |
title_short |
Retention time characterization and optimization of logic-compatible embedded DRAM cells |
title_full |
Retention time characterization and optimization of logic-compatible embedded DRAM cells |
title_fullStr |
Retention time characterization and optimization of logic-compatible embedded DRAM cells |
title_full_unstemmed |
Retention time characterization and optimization of logic-compatible embedded DRAM cells |
title_sort |
retention time characterization and optimization of logic-compatible embedded dram cells |
publishDate |
2013 |
url |
https://hdl.handle.net/10356/99047 http://hdl.handle.net/10220/12575 |
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1681048256905216000 |