A note on compiling FORTRAN loop kernels onto a dataflow architecture
Parallel Computing
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sg-nus-scholar.10635-1155632015-01-12T21:39:02Z A note on compiling FORTRAN loop kernels onto a dataflow architecture Walker, E. Morgan, G. Cass, B. Ulanowski, Z. NATIONAL SUPERCOMPUTING RESEARCH CENTRE Dataflow architecture FORTRAN loop kernels FPGA devices High performance computing Parallelizing compiler Parallel Computing 22 11 1545-1557 PACOE 2014-12-12T07:29:27Z 2014-12-12T07:29:27Z 1997-01 Article Walker, E.,Morgan, G.,Cass, B.,Ulanowski, Z. (1997-01). A note on compiling FORTRAN loop kernels onto a dataflow architecture. Parallel Computing 22 (11) : 1545-1557. ScholarBank@NUS Repository. 01678191 http://scholarbank.nus.edu.sg/handle/10635/115563 NOT_IN_WOS Scopus |
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Dataflow architecture FORTRAN loop kernels FPGA devices High performance computing Parallelizing compiler |
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Dataflow architecture FORTRAN loop kernels FPGA devices High performance computing Parallelizing compiler Walker, E. Morgan, G. Cass, B. Ulanowski, Z. A note on compiling FORTRAN loop kernels onto a dataflow architecture |
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Parallel Computing |
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NATIONAL SUPERCOMPUTING RESEARCH CENTRE |
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NATIONAL SUPERCOMPUTING RESEARCH CENTRE Walker, E. Morgan, G. Cass, B. Ulanowski, Z. |
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Article |
author |
Walker, E. Morgan, G. Cass, B. Ulanowski, Z. |
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Walker, E. |
title |
A note on compiling FORTRAN loop kernels onto a dataflow architecture |
title_short |
A note on compiling FORTRAN loop kernels onto a dataflow architecture |
title_full |
A note on compiling FORTRAN loop kernels onto a dataflow architecture |
title_fullStr |
A note on compiling FORTRAN loop kernels onto a dataflow architecture |
title_full_unstemmed |
A note on compiling FORTRAN loop kernels onto a dataflow architecture |
title_sort |
note on compiling fortran loop kernels onto a dataflow architecture |
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2014 |
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http://scholarbank.nus.edu.sg/handle/10635/115563 |
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