Low-power instruction-caches design for embedded microprocessors

Ph.D

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Bibliographic Details
Main Author: ZHU XIAOPING
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Theses and Dissertations
Language:English
Published: 2010
Subjects:
Online Access:http://scholarbank.nus.edu.sg/handle/10635/13070
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Institution: National University of Singapore
Language: English
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spelling sg-nus-scholar.10635-130702017-10-21T09:34:15Z Low-power instruction-caches design for embedded microprocessors ZHU XIAOPING ELECTRICAL & COMPUTER ENGINEERING TAY TENG TIOW Cache, Memory, Low-power, Microprocessor, Reconfiguration Ph.D DOCTOR OF PHILOSOPHY 2010-04-08T10:29:40Z 2010-04-08T10:29:40Z 2008-01-27 Thesis ZHU XIAOPING (2008-01-27). Low-power instruction-caches design for embedded microprocessors. ScholarBank@NUS Repository. http://scholarbank.nus.edu.sg/handle/10635/13070 NOT_IN_WOS en
institution National University of Singapore
building NUS Library
country Singapore
collection ScholarBank@NUS
language English
topic Cache, Memory, Low-power, Microprocessor, Reconfiguration
spellingShingle Cache, Memory, Low-power, Microprocessor, Reconfiguration
ZHU XIAOPING
Low-power instruction-caches design for embedded microprocessors
description Ph.D
author2 ELECTRICAL & COMPUTER ENGINEERING
author_facet ELECTRICAL & COMPUTER ENGINEERING
ZHU XIAOPING
format Theses and Dissertations
author ZHU XIAOPING
author_sort ZHU XIAOPING
title Low-power instruction-caches design for embedded microprocessors
title_short Low-power instruction-caches design for embedded microprocessors
title_full Low-power instruction-caches design for embedded microprocessors
title_fullStr Low-power instruction-caches design for embedded microprocessors
title_full_unstemmed Low-power instruction-caches design for embedded microprocessors
title_sort low-power instruction-caches design for embedded microprocessors
publishDate 2010
url http://scholarbank.nus.edu.sg/handle/10635/13070
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