Domain Wall Coupling-Based STT-MRAM for On-Chip Cache Applications

10.1109/TED.2014.2377751

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Bibliographic Details
Main Authors:	Seo, Yeongkyo, Fong, Xuanyao, Roy, Kaushik
Other Authors:	DEPT OF ELECTRICAL & COMPUTER ENGG
Published:	IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC 2019
Subjects:	Science & Technology Technology Physical Sciences Engineering, Electrical & Electronic Physics, Applied Engineering Physics Complementary polarizer magnetic domain walls multiterminal spin-transfer torque magnetic random access memory (STT-MRAM) on-chip memory oxidized magnetic coupling layer FAILURE DEVICE
Online Access:	https://scholarbank.nus.edu.sg/handle/10635/156169
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-156169
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spelling	sg-nus-scholar.10635-1561692021-10-01T10:33:30Z Domain Wall Coupling-Based STT-MRAM for On-Chip Cache Applications Seo, Yeongkyo Fong, Xuanyao Roy, Kaushik DEPT OF ELECTRICAL & COMPUTER ENGG Science & Technology Technology Physical Sciences Engineering, Electrical & Electronic Physics, Applied Engineering Physics Complementary polarizer magnetic domain walls multiterminal spin-transfer torque magnetic random access memory (STT-MRAM) on-chip memory oxidized magnetic coupling layer FAILURE DEVICE 10.1109/TED.2014.2377751 IEEE TRANSACTIONS ON ELECTRON DEVICES 62 2 554-560 2019-07-03T03:11:43Z 2019-07-03T03:11:43Z 2015-02-01 2019-07-03T02:52:59Z Seo, Yeongkyo, Fong, Xuanyao, Roy, Kaushik (2015-02-01). Domain Wall Coupling-Based STT-MRAM for On-Chip Cache Applications. IEEE TRANSACTIONS ON ELECTRON DEVICES 62 (2) : 554-560. ScholarBank@NUS Repository. https://doi.org/10.1109/TED.2014.2377751 00189383 15579646 https://scholarbank.nus.edu.sg/handle/10635/156169 IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC Elements
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
topic	Science & Technology Technology Physical Sciences Engineering, Electrical & Electronic Physics, Applied Engineering Physics Complementary polarizer magnetic domain walls multiterminal spin-transfer torque magnetic random access memory (STT-MRAM) on-chip memory oxidized magnetic coupling layer FAILURE DEVICE
spellingShingle	Science & Technology Technology Physical Sciences Engineering, Electrical & Electronic Physics, Applied Engineering Physics Complementary polarizer magnetic domain walls multiterminal spin-transfer torque magnetic random access memory (STT-MRAM) on-chip memory oxidized magnetic coupling layer FAILURE DEVICE Seo, Yeongkyo Fong, Xuanyao Roy, Kaushik Domain Wall Coupling-Based STT-MRAM for On-Chip Cache Applications
description	10.1109/TED.2014.2377751
author2	DEPT OF ELECTRICAL & COMPUTER ENGG
author_facet	DEPT OF ELECTRICAL & COMPUTER ENGG Seo, Yeongkyo Fong, Xuanyao Roy, Kaushik
author	Seo, Yeongkyo Fong, Xuanyao Roy, Kaushik
author_sort	Seo, Yeongkyo
title	Domain Wall Coupling-Based STT-MRAM for On-Chip Cache Applications
title_short	Domain Wall Coupling-Based STT-MRAM for On-Chip Cache Applications
title_full	Domain Wall Coupling-Based STT-MRAM for On-Chip Cache Applications
title_fullStr	Domain Wall Coupling-Based STT-MRAM for On-Chip Cache Applications
title_full_unstemmed	Domain Wall Coupling-Based STT-MRAM for On-Chip Cache Applications
title_sort	domain wall coupling-based stt-mram for on-chip cache applications
publisher	IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
publishDate	2019
url	https://scholarbank.nus.edu.sg/handle/10635/156169
_version_	1713212661947170816

Domain Wall Coupling-Based STT-MRAM for On-Chip Cache Applications

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