An Energy-Efficient Processing Element Design for Coarse-Grained Reconfigurable Architecture on FPGA
International Conference on Communications, Circuits and Systems
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sg-nus-scholar.10635-2272282022-06-21T07:14:30Z An Energy-Efficient Processing Element Design for Coarse-Grained Reconfigurable Architecture on FPGA Lingzhi Su Wang Ling Goh Jingjing Lan Vishnu P. Nambiar Anh Tuan Do Dassanayake Mudiyanselage Thilini Kaushalya Bandara ADITI KULKARNI MOHITE Wang Bo INSTITUTE OF SYSTEMS SCIENCE International Conference on Communications, Circuits and Systems 2022-06-21T05:54:30Z 2022-06-21T05:54:30Z 2022-05-13 Article Lingzhi Su, Wang Ling Goh, Jingjing Lan, Vishnu P. Nambiar, Anh Tuan Do, Dassanayake Mudiyanselage Thilini Kaushalya Bandara, ADITI KULKARNI MOHITE, Wang Bo (2022-05-13). An Energy-Efficient Processing Element Design for Coarse-Grained Reconfigurable Architecture on FPGA. International Conference on Communications, Circuits and Systems. ScholarBank@NUS Repository. https://scholarbank.nus.edu.sg/handle/10635/227228 Attribution-NonCommercial-NoDerivatives 4.0 International http://creativecommons.org/licenses/by-nc-nd/4.0/ IEEE |
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International Conference on Communications, Circuits and Systems |
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INSTITUTE OF SYSTEMS SCIENCE |
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INSTITUTE OF SYSTEMS SCIENCE Lingzhi Su Wang Ling Goh Jingjing Lan Vishnu P. Nambiar Anh Tuan Do Dassanayake Mudiyanselage Thilini Kaushalya Bandara ADITI KULKARNI MOHITE Wang Bo |
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Article |
author |
Lingzhi Su Wang Ling Goh Jingjing Lan Vishnu P. Nambiar Anh Tuan Do Dassanayake Mudiyanselage Thilini Kaushalya Bandara ADITI KULKARNI MOHITE Wang Bo |
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Lingzhi Su Wang Ling Goh Jingjing Lan Vishnu P. Nambiar Anh Tuan Do Dassanayake Mudiyanselage Thilini Kaushalya Bandara ADITI KULKARNI MOHITE Wang Bo An Energy-Efficient Processing Element Design for Coarse-Grained Reconfigurable Architecture on FPGA |
author_sort |
Lingzhi Su |
title |
An Energy-Efficient Processing Element Design for Coarse-Grained Reconfigurable Architecture on FPGA |
title_short |
An Energy-Efficient Processing Element Design for Coarse-Grained Reconfigurable Architecture on FPGA |
title_full |
An Energy-Efficient Processing Element Design for Coarse-Grained Reconfigurable Architecture on FPGA |
title_fullStr |
An Energy-Efficient Processing Element Design for Coarse-Grained Reconfigurable Architecture on FPGA |
title_full_unstemmed |
An Energy-Efficient Processing Element Design for Coarse-Grained Reconfigurable Architecture on FPGA |
title_sort |
energy-efficient processing element design for coarse-grained reconfigurable architecture on fpga |
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IEEE |
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2022 |
url |
https://scholarbank.nus.edu.sg/handle/10635/227228 |
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