A framework to explore low-power architecture and variability-aware timing estimation of FPGAs

• Main Author: LEE CHEE SING
• Other Authors: ELECTRICAL & COMPUTER ENGINEERING
• Format: Theses and Dissertations
• Language: English
• Published: 2011
• Subjects: FPGA, VPR, Affine, process variations, reconfigurable
• Online Access: http://scholarbank.nus.edu.sg/handle/10635/23150
• Institution: National University of Singapore

Master's