Method to fabricate a double-polysilicon gate structure for a sub-quarter micron self-aligned-titanium silicide process

US6180501

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Bibliographic Details
Main Authors: PEY, KIN-LEONG, HO, CHAW SING, CHAN, LAP
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Patent
Published: 2012
Online Access:http://scholarbank.nus.edu.sg/handle/10635/32585
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Institution: National University of Singapore