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HO, CHAW SING
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HO, CHAW SING
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HO, CHAW SING
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1
Method to fabricate a double-polysilicon gate structure for a sub-quarter micron self-aligned-titanium silicide process
by
PEY, KIN-LEONG
,
HO
,
CHAW
SING
,
CHAN, LAP
Published 2012
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2
Method to form uniform silicide features
by
CHAN, LAP
,
HO
,
CHAW
SING
,
LI, FONG YAU SAM
,
NG, HOU TEE
Published 2012
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3
Pulsed laser salicidation for fabrication of ultra-thin silicides in sub-quarter micron devices
by
HO
,
CHAW
SING
,
LEE, YUAN PING
,
LAP, CHAN
,
LU, YONG FENG
,
KARUNASIRI, R.P.G.
Published 2012
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4
Cmos gate architecture for integration of salicide process in sub 0.1. .muM devices
by
HO
,
CHAW
SING
,
KARUNASIRI, R. P. G.
,
CHUA, SOO JIN
,
PEY, KIN LEONG
,
LEE, KONG HEAN
Published 2012
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