Method and apparatus for a digital clock multiplication circuit
US6392498
Saved in:
Main Authors: | LYE, KIN MUN, JOE, JURIANTO |
---|---|
其他作者: | CENTRE FOR WIRELESS COMMUNICATIONS |
格式: | Patent |
出版: |
2012
|
在線閱讀: | http://scholarbank.nus.edu.sg/handle/10635/32610 |
標簽: |
添加標簽
沒有標簽, 成為第一個標記此記錄!
|
機構: | National University of Singapore |
相似書籍
-
Method and apparatus for a digital clock multiplication circuit
由: LYE, KIN MUN, et al.
出版: (2012) -
Method and apparatus for a digital clock multiplication circuit
由: LYE, KIN MUN, et al.
出版: (2012) -
METHOD AND APPARATUS FOR A GATED OSCILLATOR IN DIGITAL CIRCUITS
由: JOE, JURIANTO
出版: (2012) -
METHOD AND APPARATUS FOR A GATED OSCILLATOR IN DIGITAL CIRCUITS
由: JOE, JURIANTO
出版: (2012) -
Method and apparatus for a gated oscillator in digital circuits
由: JOE, JURIANTO
出版: (2012)