MOS device conductance modelling technique for an accurate and efficient mixed-mode simulation of CMOS circuits

Electronics Letters

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Bibliographic Details
Main Authors:	Samudra, G., Lee, T.K.
Other Authors:	ELECTRICAL ENGINEERING
Format:	Article
Published:	2014
Subjects:	CMOS integrated circuits Semiconductor device models
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/62440
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-62440
record_format	dspace
spelling	sg-nus-scholar.10635-624402015-03-06T07:58:53Z MOS device conductance modelling technique for an accurate and efficient mixed-mode simulation of CMOS circuits Samudra, G. Lee, T.K. ELECTRICAL ENGINEERING CMOS integrated circuits Semiconductor device models Electronics Letters 32 3 264-265 ELLEA 2014-06-17T06:51:04Z 2014-06-17T06:51:04Z 1996-02-01 Article Samudra, G.,Lee, T.K. (1996-02-01). MOS device conductance modelling technique for an accurate and efficient mixed-mode simulation of CMOS circuits. Electronics Letters 32 (3) : 264-265. ScholarBank@NUS Repository. 00135194 http://scholarbank.nus.edu.sg/handle/10635/62440 NOT_IN_WOS Scopus
institution	National University of Singapore
building	NUS Library
country	Singapore
collection	ScholarBank@NUS
topic	CMOS integrated circuits Semiconductor device models
spellingShingle	CMOS integrated circuits Semiconductor device models Samudra, G. Lee, T.K. MOS device conductance modelling technique for an accurate and efficient mixed-mode simulation of CMOS circuits
description	Electronics Letters
author2	ELECTRICAL ENGINEERING
author_facet	ELECTRICAL ENGINEERING Samudra, G. Lee, T.K.
format	Article
author	Samudra, G. Lee, T.K.
author_sort	Samudra, G.
title	MOS device conductance modelling technique for an accurate and efficient mixed-mode simulation of CMOS circuits
title_short	MOS device conductance modelling technique for an accurate and efficient mixed-mode simulation of CMOS circuits
title_full	MOS device conductance modelling technique for an accurate and efficient mixed-mode simulation of CMOS circuits
title_fullStr	MOS device conductance modelling technique for an accurate and efficient mixed-mode simulation of CMOS circuits
title_full_unstemmed	MOS device conductance modelling technique for an accurate and efficient mixed-mode simulation of CMOS circuits
title_sort	mos device conductance modelling technique for an accurate and efficient mixed-mode simulation of cmos circuits
publishDate	2014
url	http://scholarbank.nus.edu.sg/handle/10635/62440
_version_	1681085776057597952

MOS device conductance modelling technique for an accurate and efficient mixed-mode simulation of CMOS circuits

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