Scaling Parameter Dependent Drain Induced Barrier Lowering Effect in Double-Gate Silicon-on-Insulator Metal-Oxide-Semiconductor Field Effect Transistor

by Samudra, G., Rajendran, K.
Published 2014

Scaling Parameter Dependent Drain Induced Barrier Lowering Effect in Double-Gate Silicon-on-Insulator Metal-Oxide-Semiconductor Field Effect Transistor

by Samudra, G., Rajendran, K.
Published 2014

An accurate delay model for BiCMOS logic gates

by Samudra, G., Zhao, B.
Published 2014

Comparative analysis of minimum surface potential and location of barrier peaks in various Si MOSFET devices

by Samudra, G., Rajendran, K.
Published 2014

Simulation of recessed channel SOI mosfet

by Samudra, G.S., Yip, A.
Published 2014

Modelling of transconductance-to-current ratio (gm/ID) analysis on double-gate SOI MOSFETs

by Rajendran, K., Samudra, G.S.
Published 2014

Simple modelling of device speed in double-gate SOI MOSFETs

by Rajendran, K., Samudra, G.
Published 2014

MOS device conductance modelling technique for an accurate and efficient mixed-mode simulation of CMOS circuits

by Samudra, G., Lee, T.K.
Published 2014

A new modeling technique for mixed-mode simulation of CMOS circuits

by Samudra, G., Lee, T.K.
Published 2014

CAD/CAE in semiconductor fabrication: An integrated approach

by Arora, V.K., Samudra, G.
Published 2014

MOS device conductance modelling technique for an accurate and efficient mixed-mode simulation of CMOS circuits

by Samudra, G., Lee, T.K.
Published 2014

Simulation of 0.1μm hot carrier effect suppressed grooved gate MOSFET

by Sreelal, S., Lau, C.K., Samudra, G.S.
Published 2014

Trends in dram dielectrics

by Tang, K.S., Lau, W.S., Samudra, G.S.
Published 2014

Parasitic capacitance characteristics of deep submicrometre grooved gate MOSFETs

by Sreelal, S., Lau, C.K., Samudra, G.S.
Published 2014

Trends in dram dielectrics

by Tang, K.S., Lau, W.S., Samudra, G.S.
Published 2014

Shape effects on the performance of Si and Ge nanowire field-effect transistors based on size dependent bandstructure

by Koong, C.S., Samudra, G., Liang, G.
Published 2014

A dual BARC method for lithography and etch for Dual damascene with low K

by Mukherjee-Roy, M., Bliznetsov, V., Samudra, G.
Published 2014

Slanted oxide-bypassed superjunction power MOSFETs

by Chen, Y., Liang, Y.C., Samudra, G.S.
Published 2014

Simulation of charge pumping current in hot-carrier degraded p-MOSFET's

by Samudra, G.S., Yip, Anselm, See, L.K.
Published 2014

VLSI design for implementation of transform domain adaptive filters

by Najafi, A., Farhang-Boroujeny, B., Samudra, G.S.
Published 2014