A dual BARC method for lithography and etch for Dual damascene with low K

by Mukherjee-Roy, M., Bliznetsov, V., Samudra, G.
Published 2014

Investigation of etching properties of metal nitride/high-k gate stacks using inductively coupled plasma

by Hwang, W.S., Chen, J., Yoo, W.J., Bliznetsov, V.
Published 2014

Chemical analysis of etching residues in metal gate stack for CMOS process

by Wan, S.H., Hui, H.N., Won, J.Y., Bliznetsov, V.
Published 2014

Effects of SiO2/Si3N4 hard masks on etching properties of metal gates

by Hwang, W.S., Cho, B.-J., Chan, D.S.H., Bliznetsov, V., Yoo, W.J.
Published 2014

Integrated process of photoresist trimming and dielectric hard mask etching for sub-50 nm gate patterning

by Bliznetsov, V., Kumar, R., Lin, H., Ang, K.-W., Yoo, W.J., Du, A.
Published 2014

Etching of TiN-based gates for advanced complementary metal-oxide- semiconductor devices

by Bliznetsov, V., Singh, N., Kumar, R., Balasubramanian, N., Guo, P., Lee, S.J., Cai, Y.
Published 2014

Enhanced performance in 50 nm N-MOSFETs with silicon-carbon source/drain regions

by Ang, K.W., Chui, K.J., Bliznetsov, V., Du, A., Balasubramanian, N., Li, M.F., Samudra, G., Yeo, Y.-C.
Published 2014

Lattice strain analysis of transistor structures with silicon-germanium and silicon-carbon sourcedrain stressors

by Ang, K.-W., Chui, K.-J., Bliznetsov, V., Tung, C.-H., Du, A., Balasubramanian, N., Samudra, G., Li, M.F., Yeo, Y.-C.
Published 2014

Thin body silicon-on-insulator N-MOSFET with silicon-carbon source/drain regions for performance enhancement

by Ang, K.-W., Chui, K.-J., Bliznetsov, V., Wang, Y., Wong, L.-Y., Tung, C.-H., Balasubramanian, N., Li, M.-F., Samudra, G., Yeo, Y.-C.
Published 2014

Ge-rich (70%) SiGe nanowire MOSFET fabricated using pattern-dependent Ge-condensation technique

by Jiang, Y., Singh, N., Liow, T.Y., Loh, W.Y., Balakumar, S., Hoe, K.M., Tung, C.H., Bliznetsov, V., Rustagi, S.C., Lo, G.Q., Chan, D.S.H., Kwong, D.L.
Published 2014