An architecture and timing-driven routing algorithm for area-efficient fPGAs with time-multiplexed interconnects
10.1109/FPL.2008.4630022
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2014
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sg-nus-scholar.10635-692822015-01-16T15:31:14Z An architecture and timing-driven routing algorithm for area-efficient fPGAs with time-multiplexed interconnects Liu, H. Chen, X. Ha, Y. ELECTRICAL & COMPUTER ENGINEERING 10.1109/FPL.2008.4630022 Proceedings - 2008 International Conference on Field Programmable Logic and Applications, FPL 615-618 2014-06-19T02:58:53Z 2014-06-19T02:58:53Z 2008 Conference Paper Liu, H.,Chen, X.,Ha, Y. (2008). An architecture and timing-driven routing algorithm for area-efficient fPGAs with time-multiplexed interconnects. Proceedings - 2008 International Conference on Field Programmable Logic and Applications, FPL : 615-618. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/FPL.2008.4630022" target="_blank">https://doi.org/10.1109/FPL.2008.4630022</a> 9781424419616 http://scholarbank.nus.edu.sg/handle/10635/69282 NOT_IN_WOS Scopus |
| institution |
National University of Singapore |
| building |
NUS Library |
| country |
Singapore |
| collection |
ScholarBank@NUS |
| description |
10.1109/FPL.2008.4630022 |
| author2 |
ELECTRICAL & COMPUTER ENGINEERING |
| author_facet |
ELECTRICAL & COMPUTER ENGINEERING Liu, H. Chen, X. Ha, Y. |
| format |
Conference or Workshop Item |
| author |
Liu, H. Chen, X. Ha, Y. |
| spellingShingle |
Liu, H. Chen, X. Ha, Y. An architecture and timing-driven routing algorithm for area-efficient fPGAs with time-multiplexed interconnects |
| author_sort |
Liu, H. |
| title |
An architecture and timing-driven routing algorithm for area-efficient fPGAs with time-multiplexed interconnects |
| title_short |
An architecture and timing-driven routing algorithm for area-efficient fPGAs with time-multiplexed interconnects |
| title_full |
An architecture and timing-driven routing algorithm for area-efficient fPGAs with time-multiplexed interconnects |
| title_fullStr |
An architecture and timing-driven routing algorithm for area-efficient fPGAs with time-multiplexed interconnects |
| title_full_unstemmed |
An architecture and timing-driven routing algorithm for area-efficient fPGAs with time-multiplexed interconnects |
| title_sort |
architecture and timing-driven routing algorithm for area-efficient fpgas with time-multiplexed interconnects |
| publishDate |
2014 |
| url |
http://scholarbank.nus.edu.sg/handle/10635/69282 |
| _version_ |
1681086985199943680 |