An area-efficient dynamically reconfigurable spatial division multiplexing Network-on-Chip with static throughput guarantee

An area-efficient dynamically reconfigurable spatial division multiplexing Network-on-Chip with static throughput guarantee

10.1109/FPT.2010.5681443

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Bibliographic Details
Main Authors: Yang, Z.J., Kumar, A., Ha, Y.
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Conference or Workshop Item
Published: 2014
Subjects:
Dynamic reconfiguration
FPGA
Network-on-Chip
Spatial division multiplexing
Throughput guarantee
Online Access:http://scholarbank.nus.edu.sg/handle/10635/69283
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Institution: National University of Singapore
Description
Summary:10.1109/FPT.2010.5681443

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