An area-efficient dynamically reconfigurable spatial division multiplexing Network-on-Chip with static throughput guarantee

10.1109/FPT.2010.5681443

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Bibliographic Details
Main Authors:	Yang, Z.J., Kumar, A., Ha, Y.
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Conference or Workshop Item
Published:	2014
Subjects:	Dynamic reconfiguration FPGA Network-on-Chip Spatial division multiplexing Throughput guarantee
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/69283
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-69283
record_format	dspace
spelling	sg-nus-scholar.10635-692832015-02-12T06:28:13Z An area-efficient dynamically reconfigurable spatial division multiplexing Network-on-Chip with static throughput guarantee Yang, Z.J. Kumar, A. Ha, Y. ELECTRICAL & COMPUTER ENGINEERING Dynamic reconfiguration FPGA Network-on-Chip Spatial division multiplexing Throughput guarantee 10.1109/FPT.2010.5681443 Proceedings - 2010 International Conference on Field-Programmable Technology, FPT'10 389-392 2014-06-19T02:58:54Z 2014-06-19T02:58:54Z 2010 Conference Paper Yang, Z.J.,Kumar, A.,Ha, Y. (2010). An area-efficient dynamically reconfigurable spatial division multiplexing Network-on-Chip with static throughput guarantee. Proceedings - 2010 International Conference on Field-Programmable Technology, FPT'10 : 389-392. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/FPT.2010.5681443" target="_blank">https://doi.org/10.1109/FPT.2010.5681443</a> 9781424489817 http://scholarbank.nus.edu.sg/handle/10635/69283 NOT_IN_WOS Scopus
institution	National University of Singapore
building	NUS Library
country	Singapore
collection	ScholarBank@NUS
topic	Dynamic reconfiguration FPGA Network-on-Chip Spatial division multiplexing Throughput guarantee
spellingShingle	Dynamic reconfiguration FPGA Network-on-Chip Spatial division multiplexing Throughput guarantee Yang, Z.J. Kumar, A. Ha, Y. An area-efficient dynamically reconfigurable spatial division multiplexing Network-on-Chip with static throughput guarantee
description	10.1109/FPT.2010.5681443
author2	ELECTRICAL & COMPUTER ENGINEERING
author_facet	ELECTRICAL & COMPUTER ENGINEERING Yang, Z.J. Kumar, A. Ha, Y.
format	Conference or Workshop Item
author	Yang, Z.J. Kumar, A. Ha, Y.
author_sort	Yang, Z.J.
title	An area-efficient dynamically reconfigurable spatial division multiplexing Network-on-Chip with static throughput guarantee
title_short	An area-efficient dynamically reconfigurable spatial division multiplexing Network-on-Chip with static throughput guarantee
title_full	An area-efficient dynamically reconfigurable spatial division multiplexing Network-on-Chip with static throughput guarantee
title_fullStr	An area-efficient dynamically reconfigurable spatial division multiplexing Network-on-Chip with static throughput guarantee
title_full_unstemmed	An area-efficient dynamically reconfigurable spatial division multiplexing Network-on-Chip with static throughput guarantee
title_sort	area-efficient dynamically reconfigurable spatial division multiplexing network-on-chip with static throughput guarantee
publishDate	2014
url	http://scholarbank.nus.edu.sg/handle/10635/69283
_version_	1681086985378201600

An area-efficient dynamically reconfigurable spatial division multiplexing Network-on-Chip with static throughput guarantee

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