An area-efficient shuffling scheme for AES implementation on FPGA

10.1109/ISCAS.2013.6572405

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Bibliographic Details
Main Authors: Wang, Y., Ha, Y.
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Conference or Workshop Item
Published: 2014
Online Access:http://scholarbank.nus.edu.sg/handle/10635/69285
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Institution: National University of Singapore
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