Enhancing CMOS transistor performance using lattice-mismatched materials in source/drain regions

Enhancing CMOS transistor performance using lattice-mismatched materials in source/drain regions

Third International SiGe Technology and Device Meeting, ISTDM 2006 - Conference Digest

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Bibliographic Details
Main Author: Yeo, Y.-C.
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Conference or Workshop Item
Published: 2014
Online Access:http://scholarbank.nus.edu.sg/handle/10635/70189
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Institution: National University of Singapore
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Summary:Third International SiGe Technology and Device Meeting, ISTDM 2006 - Conference Digest

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