Enhancing CMOS transistor performance using lattice-mismatched materials in source/drain regions

Third International SiGe Technology and Device Meeting, ISTDM 2006 - Conference Digest

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Main Author:	Yeo, Y.-C.
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Conference or Workshop Item
Published:	2014
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/70189
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-70189
record_format	dspace
spelling	sg-nus-scholar.10635-701892016-03-28T00:46:07Z Enhancing CMOS transistor performance using lattice-mismatched materials in source/drain regions Yeo, Y.-C. ELECTRICAL & COMPUTER ENGINEERING Third International SiGe Technology and Device Meeting, ISTDM 2006 - Conference Digest 2006 - 2014-06-19T03:09:16Z 2014-06-19T03:09:16Z 2006 Conference Paper Yeo, Y.-C. (2006). Enhancing CMOS transistor performance using lattice-mismatched materials in source/drain regions. Third International SiGe Technology and Device Meeting, ISTDM 2006 - Conference Digest 2006 : -. ScholarBank@NUS Repository. 1424404614 http://scholarbank.nus.edu.sg/handle/10635/70189 NOT_IN_WOS Scopus
institution	National University of Singapore
building	NUS Library
country	Singapore
collection	ScholarBank@NUS
description	Third International SiGe Technology and Device Meeting, ISTDM 2006 - Conference Digest
author2	ELECTRICAL & COMPUTER ENGINEERING
author_facet	ELECTRICAL & COMPUTER ENGINEERING Yeo, Y.-C.
format	Conference or Workshop Item
author	Yeo, Y.-C.
spellingShingle	Yeo, Y.-C. Enhancing CMOS transistor performance using lattice-mismatched materials in source/drain regions
author_sort	Yeo, Y.-C.
title	Enhancing CMOS transistor performance using lattice-mismatched materials in source/drain regions
title_short	Enhancing CMOS transistor performance using lattice-mismatched materials in source/drain regions
title_full	Enhancing CMOS transistor performance using lattice-mismatched materials in source/drain regions
title_fullStr	Enhancing CMOS transistor performance using lattice-mismatched materials in source/drain regions
title_full_unstemmed	Enhancing CMOS transistor performance using lattice-mismatched materials in source/drain regions
title_sort	enhancing cmos transistor performance using lattice-mismatched materials in source/drain regions
publishDate	2014
url	http://scholarbank.nus.edu.sg/handle/10635/70189
_version_	1681087153113661440

Enhancing CMOS transistor performance using lattice-mismatched materials in source/drain regions

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