Global optimization for digital MOS circuits performance

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

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Main Authors: Chen, H.M., Samudra, G.S., Chan, D.S.H., Ibrahim, Y.
Other Authors: ELECTRICAL ENGINEERING
Format: Article
Published: 2014
Online Access:http://scholarbank.nus.edu.sg/handle/10635/80505
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Institution: National University of Singapore
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spelling sg-nus-scholar.10635-805052023-10-31T21:11:05Z Global optimization for digital MOS circuits performance Chen, H.M. Samudra, G.S. Chan, D.S.H. Ibrahim, Y. ELECTRICAL ENGINEERING INDUSTRIAL & SYSTEMS ENGINEERING IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 19 1 161-164 ITCSD 2014-10-07T02:58:15Z 2014-10-07T02:58:15Z 2000 Article Chen, H.M., Samudra, G.S., Chan, D.S.H., Ibrahim, Y. (2000). Global optimization for digital MOS circuits performance. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 19 (1) : 161-164. ScholarBank@NUS Repository. 02780070 http://scholarbank.nus.edu.sg/handle/10635/80505 000085524500013 Scopus
institution National University of Singapore
building NUS Library
continent Asia
country Singapore
Singapore
content_provider NUS Library
collection ScholarBank@NUS
description IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
author2 ELECTRICAL ENGINEERING
author_facet ELECTRICAL ENGINEERING
Chen, H.M.
Samudra, G.S.
Chan, D.S.H.
Ibrahim, Y.
format Article
author Chen, H.M.
Samudra, G.S.
Chan, D.S.H.
Ibrahim, Y.
spellingShingle Chen, H.M.
Samudra, G.S.
Chan, D.S.H.
Ibrahim, Y.
Global optimization for digital MOS circuits performance
author_sort Chen, H.M.
title Global optimization for digital MOS circuits performance
title_short Global optimization for digital MOS circuits performance
title_full Global optimization for digital MOS circuits performance
title_fullStr Global optimization for digital MOS circuits performance
title_full_unstemmed Global optimization for digital MOS circuits performance
title_sort global optimization for digital mos circuits performance
publishDate 2014
url http://scholarbank.nus.edu.sg/handle/10635/80505
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