Average-8T differential-sensing subthreshold SRAM with bit interleaving and 1k bits per bitline

10.1109/TVLSI.2013.2265265

Saved in:
Bibliographic Details
Main Authors: Khayatzadeh, M., Lian, Y.
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Article
Published: 2014
Subjects:
Online Access:http://scholarbank.nus.edu.sg/handle/10635/81997
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: National University of Singapore
Description
Summary:10.1109/TVLSI.2013.2265265