Average-8T differential-sensing subthreshold SRAM with bit interleaving and 1k bits per bitline
10.1109/TVLSI.2013.2265265
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Main Authors: | Khayatzadeh, M., Lian, Y. |
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Other Authors: | ELECTRICAL & COMPUTER ENGINEERING |
Format: | Article |
Published: |
2014
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Subjects: | |
Online Access: | http://scholarbank.nus.edu.sg/handle/10635/81997 |
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Institution: | National University of Singapore |
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