FPGA-based 40.9-gbits/s masked AES with area optimization for storage area network

• Main Authors: Wang, Y., Ha, Y.
• Other Authors: ELECTRICAL & COMPUTER ENGINEERING
• Format: Article
• Published: 2014
• Subjects: Advanced encryption standard (AES); differential power analysis (DPA); field programmable gate array (FPGA); masking; storage area network (SAN)
• Online Access: http://scholarbank.nus.edu.sg/handle/10635/82381
• Institution: National University of Singapore

10.1109/TCSII.2012.2234891