Self-aligned gate-first In0.7Ga0.3 As n-MOSFETs with an InP capping layer for performance enhancement

10.1149/1.3526139

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Bibliographic Details
Main Authors:	Gong, X., Ivana, Chin, H.-C., Zhu, Z., Lin, Y.-R., Ko, C.-H., Wann, C.H., Yeo, Y.-C.
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Article
Published:	2014
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/83004
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-83004
record_format	dspace
spelling	sg-nus-scholar.10635-830042023-10-29T20:58:01Z Self-aligned gate-first In0.7Ga0.3 As n-MOSFETs with an InP capping layer for performance enhancement Gong, X. Ivana Chin, H.-C. Zhu, Z. Lin, Y.-R. Ko, C.-H. Wann, C.H. Yeo, Y.-C. ELECTRICAL & COMPUTER ENGINEERING 10.1149/1.3526139 Electrochemical and Solid-State Letters 14 3 H117-H119 ESLEF 2014-10-07T04:36:06Z 2014-10-07T04:36:06Z 2011 Article Gong, X., Ivana, Chin, H.-C., Zhu, Z., Lin, Y.-R., Ko, C.-H., Wann, C.H., Yeo, Y.-C. (2011). Self-aligned gate-first In0.7Ga0.3 As n-MOSFETs with an InP capping layer for performance enhancement. Electrochemical and Solid-State Letters 14 (3) : H117-H119. ScholarBank@NUS Repository. https://doi.org/10.1149/1.3526139 10990062 http://scholarbank.nus.edu.sg/handle/10635/83004 000285974100014 Scopus
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
description	10.1149/1.3526139
author2	ELECTRICAL & COMPUTER ENGINEERING
author_facet	ELECTRICAL & COMPUTER ENGINEERING Gong, X. Ivana Chin, H.-C. Zhu, Z. Lin, Y.-R. Ko, C.-H. Wann, C.H. Yeo, Y.-C.
format	Article
author	Gong, X. Ivana Chin, H.-C. Zhu, Z. Lin, Y.-R. Ko, C.-H. Wann, C.H. Yeo, Y.-C.
spellingShingle	Gong, X. Ivana Chin, H.-C. Zhu, Z. Lin, Y.-R. Ko, C.-H. Wann, C.H. Yeo, Y.-C. Self-aligned gate-first In0.7Ga0.3 As n-MOSFETs with an InP capping layer for performance enhancement
author_sort	Gong, X.
title	Self-aligned gate-first In0.7Ga0.3 As n-MOSFETs with an InP capping layer for performance enhancement
title_short	Self-aligned gate-first In0.7Ga0.3 As n-MOSFETs with an InP capping layer for performance enhancement
title_full	Self-aligned gate-first In0.7Ga0.3 As n-MOSFETs with an InP capping layer for performance enhancement
title_fullStr	Self-aligned gate-first In0.7Ga0.3 As n-MOSFETs with an InP capping layer for performance enhancement
title_full_unstemmed	Self-aligned gate-first In0.7Ga0.3 As n-MOSFETs with an InP capping layer for performance enhancement
title_sort	self-aligned gate-first in0.7ga0.3 as n-mosfets with an inp capping layer for performance enhancement
publishDate	2014
url	http://scholarbank.nus.edu.sg/handle/10635/83004
_version_	1781784272674226176

Self-aligned gate-first In0.7Ga0.3 As n-MOSFETs with an InP capping layer for performance enhancement

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