Versatile pattern generation of periodic, high aspect ratio Si nanostructure arrays with sub-50-nm resolution on a wafer scale

10.1186/1556-276X-8-506

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Main Authors: Ho, J.-W., Wee, Q., Dumond, J., Tay, A., Chua, S.-J.
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Article
Published: 2014
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Online Access:http://scholarbank.nus.edu.sg/handle/10635/83256
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spelling sg-nus-scholar.10635-832562023-10-29T20:28:42Z Versatile pattern generation of periodic, high aspect ratio Si nanostructure arrays with sub-50-nm resolution on a wafer scale Ho, J.-W. Wee, Q. Dumond, J. Tay, A. Chua, S.-J. ELECTRICAL & COMPUTER ENGINEERING MECHANICAL ENGINEERING Metal-catalyzed electroless etching Non-porous Si nanostructures Step-and-repeat nanoimprint lithography Sub-50-nm resolution User-defined patterns Wafer scale 10.1186/1556-276X-8-506 Nanoscale Research Letters 8 1 1-10 2014-10-07T04:39:08Z 2014-10-07T04:39:08Z 2013 Article Ho, J.-W., Wee, Q., Dumond, J., Tay, A., Chua, S.-J. (2013). Versatile pattern generation of periodic, high aspect ratio Si nanostructure arrays with sub-50-nm resolution on a wafer scale. Nanoscale Research Letters 8 (1) : 1-10. ScholarBank@NUS Repository. https://doi.org/10.1186/1556-276X-8-506 19317573 http://scholarbank.nus.edu.sg/handle/10635/83256 000328353000001 Scopus
institution National University of Singapore
building NUS Library
continent Asia
country Singapore
Singapore
content_provider NUS Library
collection ScholarBank@NUS
topic Metal-catalyzed electroless etching
Non-porous
Si nanostructures
Step-and-repeat nanoimprint lithography
Sub-50-nm resolution
User-defined patterns
Wafer scale
spellingShingle Metal-catalyzed electroless etching
Non-porous
Si nanostructures
Step-and-repeat nanoimprint lithography
Sub-50-nm resolution
User-defined patterns
Wafer scale
Ho, J.-W.
Wee, Q.
Dumond, J.
Tay, A.
Chua, S.-J.
Versatile pattern generation of periodic, high aspect ratio Si nanostructure arrays with sub-50-nm resolution on a wafer scale
description 10.1186/1556-276X-8-506
author2 ELECTRICAL & COMPUTER ENGINEERING
author_facet ELECTRICAL & COMPUTER ENGINEERING
Ho, J.-W.
Wee, Q.
Dumond, J.
Tay, A.
Chua, S.-J.
format Article
author Ho, J.-W.
Wee, Q.
Dumond, J.
Tay, A.
Chua, S.-J.
author_sort Ho, J.-W.
title Versatile pattern generation of periodic, high aspect ratio Si nanostructure arrays with sub-50-nm resolution on a wafer scale
title_short Versatile pattern generation of periodic, high aspect ratio Si nanostructure arrays with sub-50-nm resolution on a wafer scale
title_full Versatile pattern generation of periodic, high aspect ratio Si nanostructure arrays with sub-50-nm resolution on a wafer scale
title_fullStr Versatile pattern generation of periodic, high aspect ratio Si nanostructure arrays with sub-50-nm resolution on a wafer scale
title_full_unstemmed Versatile pattern generation of periodic, high aspect ratio Si nanostructure arrays with sub-50-nm resolution on a wafer scale
title_sort versatile pattern generation of periodic, high aspect ratio si nanostructure arrays with sub-50-nm resolution on a wafer scale
publishDate 2014
url http://scholarbank.nus.edu.sg/handle/10635/83256
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