Decoding of DBEC-TBED Reed-Solomon Codes
A problem in designing semiconductor memories is to provide some measure of error control without requiring excessive coding overhead or decoding time. In LSI and VLSI technology, memories are often organized on a multiple bit (or byte) per chip basis. For example, some 256K bit DRAM's are orga...
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Main Authors: | , |
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Format: | text |
Language: | English |
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Institutional Knowledge at Singapore Management University
1987
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Online Access: | https://ink.library.smu.edu.sg/sis_research/149 https://ink.library.smu.edu.sg/context/sis_research/article/1148/viewcontent/Decoding_DBEC_TBED_1987.pdf |
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Institution: | Singapore Management University |
Language: | English |
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