Parameter synthesis for hierarchical concurrent real-time systems

Parameter synthesis for hierarchical concurrent real-time systems

Modeling and verifying complex real-time systems, involving timing delays, are notoriously difficult problems. Checking the correctness of a system for one particular value for each delay does not give any information for other values. It is hence interesting to reason parametrically, by considering...

Full description

Saved in:
Bibliographic Details
Main Authors: ANDRÉ, Étienne, LIU, Yang, SUN, Jun, DONG, Jin Song
Format: text
Language:English
Published: Institutional Knowledge at Singapore Management University 2012
Subjects:
Real-time specification
Parametric timed verification
Model checking
Robustness
Software Engineering
Online Access:https://ink.library.smu.edu.sg/sis_research/5020
https://ink.library.smu.edu.sg/context/sis_research/article/6023/viewcontent/2014_Parameter_Synthesis_for_Hierarchical_Concurrent_Real_time_Systems__2_.pdf
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Singapore Management University
Language: English

Internet

https://ink.library.smu.edu.sg/sis_research/5020
https://ink.library.smu.edu.sg/context/sis_research/article/6023/viewcontent/2014_Parameter_Synthesis_for_Hierarchical_Concurrent_Real_time_Systems__2_.pdf

Similar Items