Parameter synthesis for hierarchical concurrent real-time systems

Modeling and verifying complex real-time systems, involving timing delays, are notoriously difficult problems. Checking the correctness of a system for one particular value for each delay does not give any information for other values. It is thus interesting to reason parametrically, by considering...

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Main Authors: ANDRÉ, Étienne, LIU, Yang, SUN, Jun, DONG, Jin Song
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語言:English
出版: Institutional Knowledge at Singapore Management University 2014
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在線閱讀:https://ink.library.smu.edu.sg/sis_research/4980
https://ink.library.smu.edu.sg/context/sis_research/article/5983/viewcontent/André2014_Article_ParameterSynthesisForHierarchi.pdf
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機構: Singapore Management University
語言: English