Verifying stateful timed CSP using implicit clocks and zone abstraction

In this work, we study model checking of compositional real-time systems. A system is modeled using mutable data variables as well as a compositional timed process. Instead of explicitly manipulating clock variables, a number of compositional timed behavioral patterns are used to capture quantitativ...

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Bibliographic Details
Main Authors: SUN, Jun, LIU, Yang, DONG, Jin Song, ZHANG, Xian
Format: text
Language:English
Published: Institutional Knowledge at Singapore Management University 2009
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Online Access:https://ink.library.smu.edu.sg/sis_research/5042
https://ink.library.smu.edu.sg/context/sis_research/article/6045/viewcontent/verifying.pdf
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Institution: Singapore Management University
Language: English
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