Author Search Results

1

Impact of different dose and angle in HALO structure for 45nm NMOS device

by Salehuddin, F., Ahmad, I., Hamid, F.A., Zaharim, A.
Published 2017

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Conference Proceeding

2

Optimization of process parameter variability in 45 nm PMOS device using Taguchi method

by Salehuddin, F., Ahmad, I., Hamid, F.A., Zaharim, A.
Published 2017

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Article

3

Influence of HALO and source/drain implantation on threshold voltage in 45nm PMOS device

by Salehuddin, F., Ahmad, I., Hamid, F.A., Zaharim, A.
Published 2017

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Article

4

Effect of process parameter variations on threshold voltage in 45nm NMOS device

by Salehuddin, F., Ahmad, I., Hamid, F.A., Zaharim, A.
Published 2017

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Conference Proceeding

5

Impact of HALO structure on threshold voltage and leakage current in 45nm NMOS device

by Salehuddin, F., Ahmad, I., Hamid, F.A., Zaharim, A.
Published 2017

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Conference Proceeding

6

Analyze and optimize the silicide thickness in 45nm CMOS technology using Taguchi method

by Salehuddin, F., Ahmad, I., Hamid, F.A., Zaharim, A.
Published 2017

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Conference Proceeding

7

Characterization and optimizations of silicide thickness in 45nm pMOS device

by Salehuddin, F., Ahmad, I., Hamid, F.A., Zaharim, A.
Published 2017

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Conference Proceeding

8

Optimization of process parameter variability in 45 nm PMOS device using Taguchi method

by Salehuddin F., Ahmad I., Hamid F.A., Zaharim A.
Published 2023

Article

9

Impact of different dose and angle in HALO structure for 45nm NMOS device

by Salehuddin F., Ahmad I., Hamid F.A., Zaharim A.
Published 2023

Conference paper

10

Impact of HALO structure on threshold voltage and leakage current in 45nm NMOS device

by Salehuddin F., Ahmad I., Hamid F.A., Zaharim A.
Published 2023

Conference paper

11

Analyze and optimize the silicide thickness in 45nm CMOS technology using Taguchi method

by Salehuddin F., Ahmad I., Hamid F.A., Zaharim A.
Published 2023

Conference Paper

12

Characterization and optimizations of silicide thickness in 45nm pMOS device

by Salehuddin F., Ahmad I., Hamid F.A., Zaharim A.
Published 2023

Conference Paper

13

Effect of process parameter variations on threshold voltage in 45nm NMOS device

by Salehuddin F., Ahmad I., Hamid F.A., Zaharim A.
Published 2023

Conference paper

14

Influence of HALO and source/drain implantation on threshold voltage in 45nm PMOS device

by Salehuddin F., Ahmad I., Hamid F.A., Zaharim A.
Published 2023

Article

15

Process parameter optimisation for minimum leakage current in a 22nm p-type MOSFET using Taguchi method

by Afifah Maheran, A.H., Menon, P.S., Ahmad, I., Salehuddin, F., Mohd Zain, A.S.
Published 2017

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16

Optimization of 16 nm DG-FinFET using L25 orthogonal array of Taguchi statistical method

by Roslan A.F., Salehuddin F., Zain A.S.M., Kaharudin K.E., Ahmad I.
Published 2023

Article

17

Comparison of L25 GRA and L25 taguchi statistical method for optimizing 16 NM DG-FinFET on output variation

by Roslan A.F., Salehuddin F., Zain A.S.M., Kaharudin K.E., Ahmad I.
Published 2023

Article

18

Impact of strained channel on electrical properties of Junctionless Double Gate MOSFET

by Kaharudin K.E., Salehuddin F., Zain A.S.M., Roslan A.F., Ahmad I.
Published 2023

Conference Paper

19

Enhanced performance of 19 single gate MOSFET with high permittivity dielectric material

by Roslan A.F., Salehuddin F., Zain A.S.M., Kaharudin K.E., Ahmad I.
Published 2023

Article

20

Process parameter optimisation for minimum leakage current in a 22nm p-type MOSFET using Taguchi method

by Afifah Maheran A.H., Menon P.S., Ahmad I., Salehuddin F., Mohd Zain A.S.
Published 2023

Article