Design and optimization of 22nm NMOS transistor

• Main Authors: Afifah Maheran, A.H., Menon, P.S., Ahmad, I., Shaari, S., Elgomati, H.A., Majlis, B.Y., Salehuddin, F.
• Published: 2017
• Online Access: http://dspace.uniten.edu.my:8080/jspui/handle/123456789/5228
• Institution: Universiti Tenaga Nasional

In this paper, we investigate the effects of four process parameters and two process noise parameters on the threshold voltage (V th) of a 22nm NMOS transistor. We used TiO 2 as the high-k material to replace the SiO 2 dielectric. The NMOS transistor was simulated using the fabrication tool ATHENA a...