Computer vision: As applied to defective IC-die attachment detection

• Main Authors: Alba, Faye Reyes, Chua, Giselle Go, Francisco, Ronald Aquino, Rubia, Reuben Castro
• Format: text
• Language: English
• Published: Animo Repository 1992
• Subjects: Computer vision; Computer software; Integrated circuits; Input design, Computer; Image processing
• Online Access: https://animorepository.dlsu.edu.ph/etd_bachelors/7038
• Institution: De La Salle University

The COMPUTER VISION system is a prototype designed to evaluate the quality of attachment between IC dies and its corresponding lead frames. Evaluation is based on five criteria. The prototype is comprised of a hardware component and a software module. The hardware is divided into seven significant parts, the Analog to Digital Converter, the three Generic Array Logic (GAL) chips which are the PChost Module, the Control Module, and the Field Detector Module. The other parts are the Memory Module, the Address Counter, and the RAM Enable Module. The video frame grabber is a device built to capture the image of IC dies attached to lead frames for inspection. The software part of COMPUTER VISION performs the following functions : RECONSTRUCTION, ENHANCEMENT, SEGMENTATION, CORNER DETECTION, and CRITERIA CHECKING. The software classifies the lead frame as defective or not according to five criteria: CENTERING THE DIE ON THE BASE, SKEWNESS OF THE DIE ON THE BASE, GLUE ON THE DIE, GLUE ON THE LEAD FRAME, and CONTINUITY OF THE GLUE. The software is capable of displaying the captured image. It can also generate reports regarding the number of defective dies compared to the dies without defect. The report also summarizes the reasons why the dies were classified as defective. From the results, the group found out that the Computer Vision system requires a well defined environment. The leadframe must be placed correctly, it must be well lit, it must be properly magnified, and it must be clearly focused. The processing time is slightly above sixty seconds using a PC-AT running at 11.92 Mhz. This can be reduced by using a 386 or a 486. It can also be reduced significantly by using Parallel Processing, Dedicated Hardware and Direct Memory Access Controller.