Simulation and FPGA-based implementation of iterative parallel schedulers for optical interconnection networks
High-performance interconnection networks are required for inter-board, intra-board, and on-chip data communication. With the growth of data communication, the requirements for high bandwidth density, high scalability, low latency, and low power consumption are becoming more stringent, making optica...
Saved in:
Main Authors: | , , , , , |
---|---|
格式: | text |
出版: |
Archīum Ateneo
2017
|
主題: | |
在線閱讀: | https://archium.ateneo.edu/ecce-faculty-pubs/4 https://ieeexplore.ieee.org/document/7901448 |
標簽: |
添加標簽
沒有標簽, 成為第一個標記此記錄!
|
機構: | Ateneo De Manila University |