Low-energy and area-efficient tri-level switching scheme for SAR ADC
A novel low-energy tri-level switching scheme for low-power successive approximation register (SAR) ADC is proposed. With the input common-mode voltage (Vcm) designed to be exactly half of the reference voltage (Vref ), the switching energy of the proposed switching scheme is reduced by 96.89% a...
Saved in:
Main Authors: | Yuan, C., Lam, Y. |
---|---|
Other Authors: | School of Electrical and Electronic Engineering |
Format: | Article |
Language: | English |
Published: |
2013
|
Subjects: | |
Online Access: | https://hdl.handle.net/10356/100633 http://hdl.handle.net/10220/13270 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
Similar Items
-
Charge sharing non-binary SAR ADC
by: Chen, Xiangchen, et al.
Published: (2013) -
Energy-efficient spread second capacitor capacitive DAC for SAR ADC
by: Kim, Ju Eon, et al.
Published: (2019) -
Energy-efficient charge-recovery switching scheme for dual-capacitive arrays SAR ADC
by: Li, Y., et al.
Published: (2014) -
Design of low voltage low power SAR ADC for biomedical application
by: Venkadasamy Navaneethan
Published: (2010) -
Low power SAR ADC designs for sensing applications
by: Yang, Yongkui
Published: (2017)