Design of high performance quarter-micron retrograde well P-channel MOSFET

Design of high performance quarter-micron retrograde well P-channel MOSFET

This thesis presents the design and optimization through fabrication and simulation of quarter-micron surface-channel pMOSFETs for low power, high speed applications. The high performance pMOSFET is realized by careful design of the channel, well and source/drain doping profile. The main features of...

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Main Author: Swe, Toe Naing.
Other Authors: Yeo, Kiat Seng
Format: Theses and Dissertations
Language:English
Published: 2008
Subjects:
DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Online Access:http://hdl.handle.net/10356/13355
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-133552023-07-04T16:01:29Z Design of high performance quarter-micron retrograde well P-channel MOSFET Swe, Toe Naing. Yeo, Kiat Seng School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits This thesis presents the design and optimization through fabrication and simulation of quarter-micron surface-channel pMOSFETs for low power, high speed applications. The high performance pMOSFET is realized by careful design of the channel, well and source/drain doping profile. The main features of the fabricated devices are non-uniform channel doping, high energy deep retrograde well, p+-polysilicon gate approach and the LDD source-drain structure. Master of Engineering 2008-08-01T04:56:05Z 2008-10-20T07:26:16Z 2008-08-01T04:56:05Z 2008-10-20T07:26:16Z 1999 1999 Thesis http://hdl.handle.net/10356/13355 en 137.p. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Swe, Toe Naing.
Design of high performance quarter-micron retrograde well P-channel MOSFET
description This thesis presents the design and optimization through fabrication and simulation of quarter-micron surface-channel pMOSFETs for low power, high speed applications. The high performance pMOSFET is realized by careful design of the channel, well and source/drain doping profile. The main features of the fabricated devices are non-uniform channel doping, high energy deep retrograde well, p+-polysilicon gate approach and the LDD source-drain structure.
author2 Yeo, Kiat Seng
author_facet Yeo, Kiat Seng
Swe, Toe Naing.
format Theses and Dissertations
author Swe, Toe Naing.
author_sort Swe, Toe Naing.
title Design of high performance quarter-micron retrograde well P-channel MOSFET
title_short Design of high performance quarter-micron retrograde well P-channel MOSFET
title_full Design of high performance quarter-micron retrograde well P-channel MOSFET
title_fullStr Design of high performance quarter-micron retrograde well P-channel MOSFET
title_full_unstemmed Design of high performance quarter-micron retrograde well P-channel MOSFET
title_sort design of high performance quarter-micron retrograde well p-channel mosfet
publishDate 2008
url http://hdl.handle.net/10356/13355
_version_ 1772826835978027008

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