Development of nanocrystal memory devices

• Main Author: Chen, Tupei.
• Other Authors: School of Electrical and Electronic Engineering
• Format: Research Report
• Language: English
• Published: 2008
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Nanoelectronics
• Online Access: http://hdl.handle.net/10356/14231
• Institution: Nanyang Technological University

In this project, we have fabricated non-volatile memory (NVM) devices based on silicon nanocrystals. The nanocrystals are synthesized with very-low energy ion beam technique, and the size of the nanocrystals is ~ 4 nm as determined from TEM measurement. The fabrication of the memory devices is fully compatible with the conventional CMOS process. The memory characteristics, reliability, and the effects of tunnel oxide thickness and programming mechanisms have been investigated. Channel-hot-electron programming is found to yield a better memory performance and reliability. Promising device results have been presented, demonstrating low-voltage operation for comparable memory windows, and good thin tunnel oxide retention performance that suggests to meet long-term nonvolatility requirements. An important issue for nanocrystal memory found in this work is the charge trapping in the control oxide during the programming operation. The charge trapping leads to an increase in the threshold voltage for both the programmed and erased states during repeated programming/erasing operations. This problem could be overcome by development of high quality oxides and/or device design solutions.