A 126 μW readout circuit in 65nm CMOS with successive approximation based thresholding for domain wall magnet based random number generator

• Main Authors: Narasimman, Govind, Basu, Joydeep, Sethi, Pankaj, Krishnia, Sachin, Yi, Chen, Lew, Wen Siang, Basu, Arindam
• 其他作者: School of Electrical and Electronic Engineering
• 格式: Article
• 語言: English
• 出版: 2020
• 主題: Engineering::Electrical and electronic engineering; Random Number Generation; Low-power Electronics
• 在線閱讀: https://hdl.handle.net/10356/143334
• 機構: Nanyang Technological University

We present a novel readout circuit for a ferromagnetic Hall cross-bar based random number generator. The random orientation of magnetic domains are result of anomalous Hall-effect. These ferromagnetic Hall cross-bar structures can be integrated with the read out circuit to form a plug and play random number generator. The system can resolve up to 15-20 μV Hall-voltages from Hall probe. Application of current densities around 10 12 A/m 2 through the Ferromagnetic Hall cross-bar produces random Hall-voltage on the output terminals. To amplify the weak Hall-voltages (10-100 μV) in the presence of DC offsets, a modulation scheme is used to up-convert the signal and a band-pass amplifier is used to amplify the modulated signal. The bandpass amplifier circuit, motivated by neural recording amplifier is designed in 65nm CMOS and consumes 126 μW of power from a 1.2 V supply. Further, we present a successive approximation algorithm and its embedded implementation to set the desired threshold for digitizing the amplified Hall-voltage in presence of signal drift. Experimental results show that the resulting system can tolerate drifts in voltage up to 440 μV.