A 126 μW readout circuit in 65nm CMOS with successive approximation based thresholding for domain wall magnet based random number generator
We present a novel readout circuit for a ferromagnetic Hall cross-bar based random number generator. The random orientation of magnetic domains are result of anomalous Hall-effect. These ferromagnetic Hall cross-bar structures can be integrated with the read out circuit to form a plug and play rando...
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sg-ntu-dr.10356-1433342020-08-24T09:00:11Z A 126 μW readout circuit in 65nm CMOS with successive approximation based thresholding for domain wall magnet based random number generator Narasimman, Govind Basu, Joydeep Sethi, Pankaj Krishnia, Sachin Yi, Chen Lew, Wen Siang Basu, Arindam School of Electrical and Electronic Engineering School of Physical and Mathematical Sciences Engineering::Electrical and electronic engineering Random Number Generation Low-power Electronics We present a novel readout circuit for a ferromagnetic Hall cross-bar based random number generator. The random orientation of magnetic domains are result of anomalous Hall-effect. These ferromagnetic Hall cross-bar structures can be integrated with the read out circuit to form a plug and play random number generator. The system can resolve up to 15-20 μV Hall-voltages from Hall probe. Application of current densities around 10 12 A/m 2 through the Ferromagnetic Hall cross-bar produces random Hall-voltage on the output terminals. To amplify the weak Hall-voltages (10-100 μV) in the presence of DC offsets, a modulation scheme is used to up-convert the signal and a band-pass amplifier is used to amplify the modulated signal. The bandpass amplifier circuit, motivated by neural recording amplifier is designed in 65nm CMOS and consumes 126 μW of power from a 1.2 V supply. Further, we present a successive approximation algorithm and its embedded implementation to set the desired threshold for digitizing the amplified Hall-voltage in presence of signal drift. Experimental results show that the resulting system can tolerate drifts in voltage up to 440 μV. Accepted version 2020-08-24T09:00:11Z 2020-08-24T09:00:11Z 2020 Journal Article Narasimman, G., Basu, J., Sethi, P., Krishnia, S., Yi, C., Lew, W. S., & Basu, A. (2020). A 126 μW readout circuit in 65nm CMOS with successive approximation based thresholding for domain wall magnet based random number generator. IEEE Sensors Journal, 20(14), 7810-7818. doi:10.1109/JSEN.2020.2980021 1530-437X https://hdl.handle.net/10356/143334 10.1109/JSEN.2020.2980021 14 20 7810 7818 en IEEE Sensors Journal © 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/JSEN.2020.2980021 application/pdf |
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Engineering::Electrical and electronic engineering Random Number Generation Low-power Electronics Narasimman, Govind Basu, Joydeep Sethi, Pankaj Krishnia, Sachin Yi, Chen Lew, Wen Siang Basu, Arindam A 126 μW readout circuit in 65nm CMOS with successive approximation based thresholding for domain wall magnet based random number generator |
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We present a novel readout circuit for a ferromagnetic Hall cross-bar based random number generator. The random orientation of magnetic domains are result of anomalous Hall-effect. These ferromagnetic Hall cross-bar structures can be integrated with the read out circuit to form a plug and play random number generator. The system can resolve up to 15-20 μV Hall-voltages from Hall probe. Application of current densities around 10 12 A/m 2 through the Ferromagnetic Hall cross-bar produces random Hall-voltage on the output terminals. To amplify the weak Hall-voltages (10-100 μV) in the presence of DC offsets, a modulation scheme is used to up-convert the signal and a band-pass amplifier is used to amplify the modulated signal. The bandpass amplifier circuit, motivated by neural recording amplifier is designed in 65nm CMOS and consumes 126 μW of power from a 1.2 V supply. Further, we present a successive approximation algorithm and its embedded implementation to set the desired threshold for digitizing the amplified Hall-voltage in presence of signal drift. Experimental results show that the resulting system can tolerate drifts in voltage up to 440 μV. |
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School of Electrical and Electronic Engineering |
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School of Electrical and Electronic Engineering Narasimman, Govind Basu, Joydeep Sethi, Pankaj Krishnia, Sachin Yi, Chen Lew, Wen Siang Basu, Arindam |
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Article |
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Narasimman, Govind Basu, Joydeep Sethi, Pankaj Krishnia, Sachin Yi, Chen Lew, Wen Siang Basu, Arindam |
author_sort |
Narasimman, Govind |
title |
A 126 μW readout circuit in 65nm CMOS with successive approximation based thresholding for domain wall magnet based random number generator |
title_short |
A 126 μW readout circuit in 65nm CMOS with successive approximation based thresholding for domain wall magnet based random number generator |
title_full |
A 126 μW readout circuit in 65nm CMOS with successive approximation based thresholding for domain wall magnet based random number generator |
title_fullStr |
A 126 μW readout circuit in 65nm CMOS with successive approximation based thresholding for domain wall magnet based random number generator |
title_full_unstemmed |
A 126 μW readout circuit in 65nm CMOS with successive approximation based thresholding for domain wall magnet based random number generator |
title_sort |
126 μw readout circuit in 65nm cmos with successive approximation based thresholding for domain wall magnet based random number generator |
publishDate |
2020 |
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https://hdl.handle.net/10356/143334 |
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1681057804762218496 |