A highly efficient power model for Correlation Power Analysis (CPA) of pipelined Advanced Encryption Standard (AES)

We evaluate the vulnerability of a pipelined Advanced Encryption Standard (AES) against Correlation Power Analysis (CPA) Side-Channel Attack (SCA). We identify that the registers in pipelined AES are most vulnerable against CPA SCA and propose a new power model targeting the switching activities of...

Full description

Saved in:
Bibliographic Details
Main Authors: Ng, Jun-Sheng, Chen, Juncheng, Kyaw, Nay Aung, Lwin, Ne Kyaw Zwa, Ho, Weng-Geng, Chong, Kwen-Siong, Gwee, Bah-Hwee
Other Authors: School of Electrical and Electronic Engineering
Format: Conference or Workshop Item
Language:English
Published: 2021
Subjects:
Online Access:https://hdl.handle.net/10356/146374
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Nanyang Technological University
Language: English
id sg-ntu-dr.10356-146374
record_format dspace
spelling sg-ntu-dr.10356-1463742021-02-11T04:38:26Z A highly efficient power model for Correlation Power Analysis (CPA) of pipelined Advanced Encryption Standard (AES) Ng, Jun-Sheng Chen, Juncheng Kyaw, Nay Aung Lwin, Ne Kyaw Zwa Ho, Weng-Geng Chong, Kwen-Siong Gwee, Bah-Hwee School of Electrical and Electronic Engineering IEEE International Symposium on Circuits and Systems (ISCAS) Engineering::Electrical and electronic engineering Pipelined Advanced Encryption Standard (AES) Hardware Security We evaluate the vulnerability of a pipelined Advanced Encryption Standard (AES) against Correlation Power Analysis (CPA) Side-Channel Attack (SCA). We identify that the registers in pipelined AES are most vulnerable against CPA SCA and propose a new power model targeting the switching activities of the registers. The proposed power model is constructed based on the Hamming Distance (HD) between the intermediate values stored in the registers in two consecutive clock cycles. Then, we analyze the vulnerability of pipelined AES under two scenarios. First, during regular pipeline operation where the device is performing AES pipeline operation. Second, in non-pipeline operation where we assume the adversaries can insert delay to the input of the device to increase the signal to noise ratio of the physical leakage information. The simulation results show that under regular pipelined operation, our proposed power model can reveal all the 16 key bytes in less than 4,900 traces, resulting in 4.7× more effective than the conventional power models. Under non-pipelined operation, our proposed power model requires only 590 traces to reveal all the 16 key bytes, which is 5.9× more effective than other power models. National Research Foundation (NRF) Accepted version This research work was in part supported by Singapore National Research Foundation (NRF) under “SOCure” grant NRF2018NCR-NCR002-0001. The authors thank NRF for the kind support in funding this research. 2021-02-11T04:38:25Z 2021-02-11T04:38:25Z 2020 Conference Paper Ng, J.-S., Chen, J., Kyaw, N. A., Lwin, N. K. Z., Ho, W.-G., Chong, K.-S., & Gwee, B.-H. (2020). A highly efficient power model for Correlation Power Analysis (CPA) of pipelined Advanced Encryption Standard (AES). Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), 1-5. doi:10.1109/ISCAS45731.2020.9180778. 2158-1525 https://hdl.handle.net/10356/146374 1 5 en NRF2018NCR-NCR002-0001 © 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/ISCAS45731.2020.9180778 application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic Engineering::Electrical and electronic engineering
Pipelined Advanced Encryption Standard (AES)
Hardware Security
spellingShingle Engineering::Electrical and electronic engineering
Pipelined Advanced Encryption Standard (AES)
Hardware Security
Ng, Jun-Sheng
Chen, Juncheng
Kyaw, Nay Aung
Lwin, Ne Kyaw Zwa
Ho, Weng-Geng
Chong, Kwen-Siong
Gwee, Bah-Hwee
A highly efficient power model for Correlation Power Analysis (CPA) of pipelined Advanced Encryption Standard (AES)
description We evaluate the vulnerability of a pipelined Advanced Encryption Standard (AES) against Correlation Power Analysis (CPA) Side-Channel Attack (SCA). We identify that the registers in pipelined AES are most vulnerable against CPA SCA and propose a new power model targeting the switching activities of the registers. The proposed power model is constructed based on the Hamming Distance (HD) between the intermediate values stored in the registers in two consecutive clock cycles. Then, we analyze the vulnerability of pipelined AES under two scenarios. First, during regular pipeline operation where the device is performing AES pipeline operation. Second, in non-pipeline operation where we assume the adversaries can insert delay to the input of the device to increase the signal to noise ratio of the physical leakage information. The simulation results show that under regular pipelined operation, our proposed power model can reveal all the 16 key bytes in less than 4,900 traces, resulting in 4.7× more effective than the conventional power models. Under non-pipelined operation, our proposed power model requires only 590 traces to reveal all the 16 key bytes, which is 5.9× more effective than other power models.
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Ng, Jun-Sheng
Chen, Juncheng
Kyaw, Nay Aung
Lwin, Ne Kyaw Zwa
Ho, Weng-Geng
Chong, Kwen-Siong
Gwee, Bah-Hwee
format Conference or Workshop Item
author Ng, Jun-Sheng
Chen, Juncheng
Kyaw, Nay Aung
Lwin, Ne Kyaw Zwa
Ho, Weng-Geng
Chong, Kwen-Siong
Gwee, Bah-Hwee
author_sort Ng, Jun-Sheng
title A highly efficient power model for Correlation Power Analysis (CPA) of pipelined Advanced Encryption Standard (AES)
title_short A highly efficient power model for Correlation Power Analysis (CPA) of pipelined Advanced Encryption Standard (AES)
title_full A highly efficient power model for Correlation Power Analysis (CPA) of pipelined Advanced Encryption Standard (AES)
title_fullStr A highly efficient power model for Correlation Power Analysis (CPA) of pipelined Advanced Encryption Standard (AES)
title_full_unstemmed A highly efficient power model for Correlation Power Analysis (CPA) of pipelined Advanced Encryption Standard (AES)
title_sort highly efficient power model for correlation power analysis (cpa) of pipelined advanced encryption standard (aes)
publishDate 2021
url https://hdl.handle.net/10356/146374
_version_ 1692012955410890752