Radiation hardened RISC-V processor
This thesis focuses on designing and validating an open-source 32-bit RISC-V processor and implementing using NTU’s in-house RHBD cell library. We inves tigate, analyse and compare the final layout in timing, area, and power based on three different libraries: (a) Full triple-module-redundancy (T...
Saved in:
Main Author: | Gu, Haoteng |
---|---|
Other Authors: | Chang Joseph |
Format: | Thesis-Master by Coursework |
Language: | English |
Published: |
Nanyang Technological University
2022
|
Subjects: | |
Online Access: | https://hdl.handle.net/10356/156208 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
Similar Items
-
A radiation-hardened-by-design RISC-V microcontroller
by: Fang, Rouli
Published: (2024) -
RISC-V processor FPGA implementation
by: Tey, Jing Kai
Published: (2024) -
Radiation hardened ICs
by: Ding, Xiangbin
Published: (2015) -
Development of a risc processor based remote terminal unit (RTU)
by: Ng, Kwee Chye.
Published: (2008) -
Radiation hardened CMOS design
by: Di, Jiwei
Published: (2019)