A 65-nm 8T SRAM compute-in-memory macro with column ADCs for processing neural networks

In this work, we present a novel 8T static random access memory (SRAM)-based compute-in-memory (CIM) macro for processing neural networks with high energy efficiency. The proposed 8T bitcell is free from disturb issues thanks to the decoupled read channels by adding two extra transistors to the stan...

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Main Authors: Yu, Chengshuo, Yoo, Taegeun, Chai, Kevin Tshun Chuan, Kim, Tony Tae-Hyoung, Kim, Bongjin
其他作者: School of Electrical and Electronic Engineering
格式: Article
語言:English
出版: 2022
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在線閱讀:https://hdl.handle.net/10356/163744
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機構: Nanyang Technological University
語言: English