A 28GHz low-noise amplifier based on 40nm CMOS

This dissertation first introduces the theoretical basis of low-noise amplifiers, which includes active devices in CMOS process, passive devices, common topologies and performance indicators of LNAs. Then the design process of the LNA is introduced, including the selection of bias voltage and act...

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主要作者: Zeng, Haoyang
其他作者: Zheng Yuanjin
格式: Thesis-Master by Coursework
語言:English
出版: Nanyang Technological University 2023
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在線閱讀:https://hdl.handle.net/10356/168047
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spelling sg-ntu-dr.10356-1680472023-07-04T16:22:08Z A 28GHz low-noise amplifier based on 40nm CMOS Zeng, Haoyang Zheng Yuanjin School of Electrical and Electronic Engineering Technical University of Munich YJZHENG@ntu.edu.sg Engineering This dissertation first introduces the theoretical basis of low-noise amplifiers, which includes active devices in CMOS process, passive devices, common topologies and performance indicators of LNAs. Then the design process of the LNA is introduced, including the selection of bias voltage and active device parameters, the design of on-chip inductor, the design of reducing noise factor and the design of matching network. Master of Science (Integrated Circuit Design) 2023-05-26T02:20:21Z 2023-05-26T02:20:21Z 2023 Thesis-Master by Coursework Zeng, H. (2023). A 28GHz low-noise amplifier based on 40nm CMOS. Master's thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/168047 https://hdl.handle.net/10356/168047 en application/pdf Nanyang Technological University
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic Engineering
spellingShingle Engineering
Zeng, Haoyang
A 28GHz low-noise amplifier based on 40nm CMOS
description This dissertation first introduces the theoretical basis of low-noise amplifiers, which includes active devices in CMOS process, passive devices, common topologies and performance indicators of LNAs. Then the design process of the LNA is introduced, including the selection of bias voltage and active device parameters, the design of on-chip inductor, the design of reducing noise factor and the design of matching network.
author2 Zheng Yuanjin
author_facet Zheng Yuanjin
Zeng, Haoyang
format Thesis-Master by Coursework
author Zeng, Haoyang
author_sort Zeng, Haoyang
title A 28GHz low-noise amplifier based on 40nm CMOS
title_short A 28GHz low-noise amplifier based on 40nm CMOS
title_full A 28GHz low-noise amplifier based on 40nm CMOS
title_fullStr A 28GHz low-noise amplifier based on 40nm CMOS
title_full_unstemmed A 28GHz low-noise amplifier based on 40nm CMOS
title_sort 28ghz low-noise amplifier based on 40nm cmos
publisher Nanyang Technological University
publishDate 2023
url https://hdl.handle.net/10356/168047
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