A digital bit-reconfigurable versatile compute-in-memory macro for machine learning acceleration
This brief proposes a digital versatile SRAM-based computing-in-memory (CIM) macro with reconfigurable precision from 1-bit to 16-bit and programmable mathematical functions, including addition and multiplication. The proposed CIM macro supports 116-bit weight-stationary addition (WSA) and operands-...
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Main Authors: | , , , |
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格式: | Article |
語言: | English |
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2023
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在線閱讀: | https://hdl.handle.net/10356/170326 |
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機構: | Nanyang Technological University |
語言: | English |