Design of an ultra-low-voltage low-power current reference
This dissertation presents a low voltage CMOS current reference operating in the subthreshold region. Implemented using TSMC-40 nm process technology, it consumes 0.48 μW at a supply voltage of 0.4 V, with an average output current of 298.2nA. The design incorporates frequency compensation and tempe...
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| 格式: | Thesis-Master by Coursework |
| 語言: | English |
| 出版: |
Nanyang Technological University
2023
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| 主題: | |
| 在線閱讀: | https://hdl.handle.net/10356/170465 |
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