Design of an ultra-low-voltage low-power current reference

Design of an ultra-low-voltage low-power current reference

This dissertation presents a low voltage CMOS current reference operating in the subthreshold region. Implemented using TSMC-40 nm process technology, it consumes 0.48 μW at a supply voltage of 0.4 V, with an average output current of 298.2nA. The design incorporates frequency compensation and tempe...

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書目詳細資料
主要作者:	He, Xinyu
其他作者:	Chan Pak Kwong
格式:	Thesis-Master by Coursework
語言:	English
出版:	Nanyang Technological University 2023
主題:	Engineering::Electrical and electronic engineering
在線閱讀:	https://hdl.handle.net/10356/170465
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!

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