Design of an ultra-low-voltage CMOS relaxation clock oscillator

This dissertation presents the design of a 0.45 V fully-integrated relaxation oscillator using TSMC 40nm CMOS process technology. It comprises, a 2-Transistor (2-T) voltage reference, a current reference generator and a comparator in conjunction of the associated switched-capacitor network. The 2-T...

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Bibliographic Details
Main Author: Zhao, Bingbing
Other Authors: Chan Pak Kwong
Format: Thesis-Master by Coursework
Language:English
Published: Nanyang Technological University 2023
Subjects:
Online Access:https://hdl.handle.net/10356/168607
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Institution: Nanyang Technological University
Language: English